RT Journal Article
T1 Generating posit-based accelerators with high-level synthesis
A1 Murillo Montero, Raúl
A1 Del Barrio García, Alberto Antonio
A1 Botella Juan, Guillermo
A1 Pilato, Christian
AB Recently, the posit number system has demonstrated a higher accuracy over standard floating-point arithmetic for many scientific applications. However, when it comes to implementing accelerators for these applications, the tool support for this arithmetic format is still missing, especially during the step. In this paper, we incorporate the posit data type into the high-level synthesis (HLS) design process, so that we can generate the implementation directly from a given behavioral specification, but using posit numbers instead of the classical floating-point notations. Our evaluations show that, even if posit-based circuits require more area than their floating-point counterparts, they offer higher accuracy when using the same bitwidth. For example, using posit arithmetic can reduce computation errors by about two orders of magnitude when compared to using standard floating-point numbers. Our approach also includes an alternative to mitigate the high overheads of the posits and broadening the potential use of this format. We also propose a hybrid scheme that uses posit numbers only in the private local memory, while the accelerator operates in the classic floating-point notation. This solution is useful when the designers want to optimize local memories and data transfers, but still use legacy high-level synthesis (HLS) tools that only support traditional floating-point notations.
PB IEEE
SN 1549-8328
YR 2023
FD 2023-10
LK https://hdl.handle.net/20.500.14352/102790
UL https://hdl.handle.net/20.500.14352/102790
LA eng
NO 2023 Acuerdos transformativos CRUE
NO Ministerio de Ciencia e Innovación (España)
NO Agencia Estatal de Investigación (España)
NO Fondo Europeo de Desarrollo Regional (FEDER)
NO Fundación BBVA
NO Comunidad de Madrid
NO Unión Europea. H2020
DS Docta Complutense
RD 7 abr 2025