%0 Journal Article
%A Fernández Pérez, Luis Antonio
%A Martín Mayor, Víctor
%A Muñoz Sudupe, Antonio
%A otros, ...
%T Simulating spin systems on IANUS, an FPGA-based computer
%D 2008
%@ 0010-4655
%U https://hdl.handle.net/20.500.14352/51916
%X We describe the hardwired implementation of algorithms for Monte Carlo simulations of a large class of spin models. We have implemented these algorithms as VHDL codes and we have mapped them onto a dedicated processor based on a large FPGA device. The measured performance on one such processor is comparable to O(100) carefully programmed high-end PCs: it turns out to be even better for some selected spin models. We describe here codes that we are currently executing on the IANUS massively parallel FPGA-based system.
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