RT Journal Article
T1 Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices
A1 Komalan, Manu
A1 Gupta, Mohit
A1 Catthoor, Francky
A1 Gómez Pérez, José Ignacio
A1 Marinelli, Tommaso
A1 Tenllado Van Der Reijden, Christian Tomás
AB As the technology scaling advances, limitations of traditional memories in terms of density and energy become more evident. Modern caches occupy a large part of a CPU physical size and high static leakage poses a limit to the overall efficiency of the systems, including IoT/edge devices. Several alternatives to CMOS SRAM memories have been studied during the past few decades, some of which already represent a viable replacement for different levels of the cache hierarchy. One of the most promising technologies is the spin-transfertorque magnetic RAM (STT-MRAM), due to its small basic cell design, almost absent static current and nonvolatility as an added value. However, nothing comes for free, and designers will have to deal with other limitations, such as the higher latencies and dynamic energy consumption for write operations compared to reads. The goal of this work is to explore several microarchitectural parameters that may overcome some of those drawbacks when using STT-MRAM as last-level cache (LLC) in embedded devices. Such parameters include: number of cache banks, number of miss status handling registers (MSHRs) and write buffer entries, presence of hardware prefetchers. We show that an effective tuning of those parameters may virtually remove any performance loss while saving more than 60% of the LLC energy on average. The analysis is then extended comparing the energy results from calibrated technology models with data obtained with freely available tools, highlighting the importance of using accurate models for architectural exploration.
PB Association for Computing Machinery
SN 1539-9087
YR 2022
FD 2022-01-20
LK https://hdl.handle.net/20.500.14352/96520
UL https://hdl.handle.net/20.500.14352/96520
LA eng
DS Docta Complutense
RD 7 abr 2025