RT Journal Article
T1 Reducing cache hierarchy energy consumption by predicting forwarding and disabling associative sets
A1 Carazo, Pablo
A1 Apollini, Ruben
A1 Castro Rodríguez, Fernando
A1 Chaver Martínez, Daniel Ángel
A1 Piñuel Moreno, Luis
A1 Tirado Fernández, José Francisco
AB The first level data cache in modern processors has become a major consumer of energy due to its increasing size and high frequency access rate. In order to reduce this high energy consumption, we propose in this paper a straightforward filtering technique based on a highly accurate forwarding predictor. Specifically, a simple structure predicts whether a load instruction will obtain its corresponding data via forwarding from the load-store structure - thus avoiding the data cache access - or if it will be provided by the data cache. This mechanism manages to reduce the data cache energy consumption by an average of 21.5% with a negligible performance penalty of less than 0.1%. Furthermore, in this paper we focus on the cache static energy consumption too by disabling a portion of sets of the L2 associative cache. Overall, when merging both proposals, the combined L1 and L2 total energy consumption is reduced by an average of 29.2% with a performance penalty of just 0.25%.
PB World Scientific Publ co Pte LTD
SN 0218-1266
YR 2012
FD 2012-11
LK https://hdl.handle.net/20.500.14352/44467
UL https://hdl.handle.net/20.500.14352/44467
LA eng
NO This work has been supported in part by the Spanish government through the research contract CICYT-TIN 2008/508, TIN2012-32180, Consolider Ingenio-2010 CSD2007-0050 and the HIPEAC-3 European Network of Excellence
NO Spanish governmen
NO HIPEAC-3 European Network of Excellence
DS Docta Complutense
RD 10 abr 2025