RT Book, Section
T1 A machine learning-based framework for throughput estimation of time-varying applications in multi-core servers
A1 Iranfar, Arman
A1 Souza, Wellington Silva de
A1 Zapater, Marina
A1 Olcoz Herrero, Katzalin
A1 Souza, Samuel Xavier de
A1 Atienza, David
AB Accurate workload prediction and throughput estimation are keys in efficient proactive power and performance management of multi-core platforms. Although hardware performance counters available on modern platforms contain important information about the application behavior, employing them efficiently is not straightforward when dealing with time-varying applications even if they have iterative structures. In this work, we propose a machine learning-based framework for workload prediction and throughput estimation using hardware events. Our framework enables throughput estimation over various available system configurations, namely, number of parallel threads and operating frequency. In particular, we first employ workload clustering and classification techniques along with Markov chains to predict the next workload for each available system configuration. Then, the predicted workload is used to estimate the next expected throughput through a machine learning-based regression model. The comparison with state of the art demonstrates that our framework is able to improve Quality of Service (QoS) by 3.4x, while consuming 15% less power thanks to the more accurate throughput estimation.
PB IEEE
SN 978-1-7281-3915-9
YR 2019
FD 2019
LK https://hdl.handle.net/20.500.14352/14038
UL https://hdl.handle.net/20.500.14352/14038
LA eng
NO ©2019 IEEEIFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)(27. 2019. Cuzco, Perú)ISSN 2324-8432This work has been supported by Spanish MINECO (GA. No. TIN2015-65277-R), the Spanish MINECO (GA. No. S2018/TCS-4423), the SERI Seed Money project (GA No. SMG1702), the EC H2020 RECIPE project (GA No. 801137), and the ERC Consolidator Grant COMPUSAPIEN (GA No. 725657).
NO Unión Europea. H2020
NO Ministerio de Economía y Competitividad (MINECO)
NO State Secretariat for Education, Research and Innovation (SERI)
DS Docta Complutense
RD 6 oct 2024