TY  - JOUR
AU  - Imaña Pascual, José Luis
PY  - 2021
DO  - 10.1109/TC.2020.2980259
SN  - 0018-9340
UR  - https://hdl.handle.net/20.500.14352/7669
T2  - IEEE transactions on computers
AB  - In this article, a new architecture of bit-serial polynomial basis (PB) multipliers over the binary extension field GF(^2m) generated by irreducible trinomials is presented. Bit-serial GF(^2m) PB multiplication offers a performance/area trade-off that...
LA  - eng
M2  - 156
PB  - Institute of Electrical and Electronics Engineers (IEEE)
KW  - Multiplication
KW  - Architectures
KW  - Multipliers
KW  - LFSR
KW  - Bit-serial
KW  - GF(^2m)
KW  - Polynomial basis
KW  - Trinomials
TI  - LFSR-based bit-serial GF(^2m) multipliers using irreducible trinomials
TY  - journal article
VL  - 70
ER  -