TY  - JOUR
AU  - Clemente Barreira, Juan Antonio
AU  - Gran, Rubén
AU  - Chocano Gómez, Abel
AU  - Prado, Carlos del
AU  - Resano, Javier
PY  - 2015
DO  - 10.1109/TVLSI.2015.2417595
SN  - 1063-8210
UR  - https://hdl.handle.net/20.500.14352/24086
T2  - Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
AB  - The efficiency of the reconfiguration process in modern FPGAs can improve drastically if an on-chip configuration memory is included in the system because it can reduce both the reconfiguration latency and its energy consumption. However, FPGA on-chip...
LA  - spa
PB  - IEEE
KW  - FPGA
KW  - Configuration Caching
KW  - Configuration mapping
TI  - Hardware Architectural Support for Caching Partitioned Reconfigurations in Reconfigurable Systems
TY  - journal article
VL  - PP
ER  -