<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-08-20T15:35:14Z</responseDate><request verb="GetRecord" identifier="oai:docta.ucm.es:20.500.14352/98211.2" metadataPrefix="rdf">https://docta.ucm.es/rest/oai/request</request><GetRecord><record><header><identifier>oai:docta.ucm.es:20.500.14352/98211.2</identifier><datestamp>2025-08-28T13:46:26Z</datestamp><setSpec>com_20.500.14352_14</setSpec><setSpec>col_20.500.14352_15</setSpec></header><metadata><rdf:RDF xmlns:rdf="http://www.openarchives.org/OAI/2.0/rdf/" xmlns:ow="http://www.ontoweb.org/ontology/1#" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:ds="http://dspace.org/ds/elements/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/rdf/ http://www.openarchives.org/OAI/2.0/rdf.xsd">
   <ow:Publication rdf:about="oai:docta.ucm.es:20.500.14352/98211.2">
      <dc:title>Time-dependent dielectric breakdown on subnanometer EOT nMOS FinFETs</dc:title>
      <dc:creator>Feijoo, Pedro Carlos</dc:creator>
      <dc:creator>Kauerauf, Thomas</dc:creator>
      <dc:creator>Toledano-Luque, María</dc:creator>
      <dc:creator>Togo, Misuhiro</dc:creator>
      <dc:creator>San Andrés Serrano, Enrique</dc:creator>
      <dc:creator>Groeseneken, Guido.</dc:creator>
      <dc:description>Está depositada la versión preprint del artículo</dc:description>
      <dc:description>In this paper, the time-dependent dielectric breakdown (TDDB) in sub-1-nm equivalent oxide thickness (EOT) n-type bulk FinFETs is studied. The gate stacks consist of an IMEC clean interfacial layer, atomic layer deposition HfO2 high-kappa and TiN metal electrode. For the 0.8-nm EOT FinFETs, it is found that TDDB lifetime is consistent with results of planar devices for areas around 10(-8) cm(2), implying that the FinFET architecture does not seem to introduce new failure mechanisms. However, for devices with smaller area, the extrapolated voltage at a ten-year lifetime for soft breakdown (SBD) does not meet the specifications, and as a consequence, the SBD path wear-out will have to be included in the final extrapolation. Furthermore, it is shown that for EOTs smaller than 0.8 nm, the TDDB reliability on n-type FinFETs is challenged by the high leakage currents.</dc:description>
      <dc:date>2024-11-14T12:58:16Z</dc:date>
      <dc:date>2024-02-02T11:38:48Z</dc:date>
      <dc:date>2024-11-14T12:58:16Z</dc:date>
      <dc:date>2012</dc:date>
      <dc:type>journal article</dc:type>
      <dc:identifier>1530-4388</dc:identifier>
      <dc:identifier>https://hdl.handle.net/20.500.14352/98211.2</dc:identifier>
      <dc:identifier>1558-2574</dc:identifier>
      <dc:identifier>https://doi.org/10.1109/TDMR.2011.2180387</dc:identifier>
      <dc:language>eng</dc:language>
      <dc:relation>info:eu-repo/grantAgreement/TEC2010-18051</dc:relation>
      <dc:rights>open access</dc:rights>
      <dc:publisher>Institute of Electrical and Electronics Engineers</dc:publisher>
   </ow:Publication>
</rdf:RDF></metadata></record></GetRecord></OAI-PMH>