Reviriego, PedroRuano Ramos, ÓscarFlanagan, MarkPontarelli, SalvatoreMaestro De La Cuerda, Juan Antonio2024-11-052024-11-052013P. Reviriego, O. Ruano, M. F. Flanagan, S. Pontarelli and J. A. Maestro, "An Efficient Technique to Protect Serial Shift Registers Against Soft Errors," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 60, no. 8, pp. 512-516, Aug. 2013, doi: 10.1109/TCSII.2013.2268346. keywords: {Delay lines;Shift registers;Tunneling magnetoresistance;Clocks;Convolutional codes;Logic gates;Delay lines;modular redundancy;shift registers;soft errors},10.1109/TCSII.2013.2268346https://hdl.handle.net/20.500.14352/110023This brief presents a technique to efficiently correct single soft errors in serial shift registers. The proposed scheme uses two copies of the shift register. To achieve error correction, data are convolutionally encoded at the input of one of the copies and are decoded at its output. This processing ensures that in that copy, any error affecting a single bit will corrupt its output for multiple cycles. On the other hand, a single-bit error in the original copy will corrupt its output only for one cycle. Therefore, the error patterns can be used to identify the copy that has suffered the error and, consequently, to correct the error. The proposed technique has been implemented in a Hardware Description Language and implemented in a 45-nm library. A fault injection tool has been used to evaluate the effectiveness of the proposed scheme, showing that it can correct all single soft errors. The cost of the proposed approach in terms of circuit area has been compared with a traditional triple-modular redundancy implementation. The results show significant cost reductions, which approach a factor of 33% for large shift registers.engAttribution-NonCommercial 4.0 Internationalhttp://creativecommons.org/licenses/by-nc/4.0/journal articlemetadata only accessHardware33 Ciencias Tecnológicas