Person:
Prieto Matías, Manuel

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First Name
Manuel
Last Name
Prieto Matías
URI
https://hdl.handle.net/20.500.14352/78600
Affiliation
Universidad Complutense de Madrid
Faculty / Institute
Informática
Department
Arquitectura de Computadores y Automática
Area
Arquitectura y Tecnología de Computadores
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Author: Castro, F. × End date: 2009 ×

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    A power-efficient and scalable load-store queue design
    (Integrated circuit and system design: power and timing modeling, optimization and simulation, 2005) Castro, F.; Chaver Martínez, Daniel Ángel; Piñuel Moreno, Luis; Prieto Matías, Manuel; Huang, M. C.; Tirado Fernández, Francisco
    The load-store queue (LQ-SQ) of modem superscalar processors is responsible for keeping the order of memory operations. As the performance gap between processing speed and memory access becomes worse, the capacity requirements for the LQ-SQ increase, and its design becomes a challenge due to its CAM structure. In this paper we propose an efficient load-store queue state filtering mechanism that provides a significant energy reduction (on average 35% in the LSQ and 3.5% in the whole processor), and only incurs a negligible performance loss of less than 0.6%.