Person: Gómez Pérez, José Ignacio
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First Name
José Ignacio
Last Name
Gómez Pérez
Affiliation
Universidad Complutense de Madrid
Faculty / Institute
Informática
Department
Arquitectura de Computadores y Automática
Area
Arquitectura y Tecnología de Computadores
Identifiers
7 results
Search Results
Now showing 1 - 7 of 7
Item Improving the representativeness of simulation intervals for the cache memory system(IEEE Access, 2024) Bueno Mora, Nicolás; Castro Rodríguez, Fernando; Piñuel Moreno, Luis; Gómez Pérez, José Ignacio; Catthor, FranckyAccurate simulation techniques are indispensable to efficiently propose new memory or architectural organizations. As implementing new hardware concepts in real systems is often not feasible, cycle-accurate simulators employed together with certain benchmarks are commonly used. However, detailed simulators may take too much time to execute these programs until completion. Therefore, several techniques aimed at reducing this time are usually employed. These schemes select fragments of the source code considered as representative of the entire application’s behaviour–mainly in terms of performance, but not plenty considering the behaviour of cache memory levels–and only these intervals are simulated. Our hypothesis is that the different simulation windows currently employed when evaluating microarchitectural proposals, especially those involving the last level cache (LLC), do not reproduce the overall cache behaviour during the entire execution, potentially leading to wrong conclusions on the real performance of the proposals assessed. In this work, we first demonstrate this hypothesis by evaluating different cache replacement policies using various typical simulation approaches. Consequently, we also propose a simulation strategy, based on the applications’ LLC activity, which mimics the overall behaviour of the cache much closer than conventional simulation intervals. Our proposal allows a fairer comparison between cache-related approaches as it reports, on average, a number of changes in the relative order among the policies assessed – with respect to the full simulation – more than 30% lower than that of conventional strategies, maintaining the simulation time largely unchanged and without losing accuracy on performance terms, especially for memory-intensive applications.- Project number: 126
Item Herramientas para el diseño y gestión de Guías Docentes digitales(2021) García Payo, María del Carmen; Aranda Iriarte, José Ignacio; Franco Peláez, Francisco Javier; Tenllado Van Der Reijden, Christian Tomás; García Sánchez, Carlos; Gómez Pérez, José Ignacio; Riveira Martín, Mercedes del Carmen; Sanmartino Rodríguez, Julio Antonio; Payo Rubio, Marina; Pino Hernández, Javier; Díaz Núñez, Guillermo Jesús; Villar Serrano, DanielEl objetivo de este proyecto es elaborar una herramienta web que permita a los profesores actualizar las fichas docentes de su asignatura de forma online mediante un formulario web, almacenando la información de las guías en una base de datos, de modo que el sistema señale los cambios realizados, gestione el acceso y permisos de los usuarios, y permita exportar y generar las fichas de las asignaturas en diversos formatos respetando los apartados y condiciones de la Memoria de Verificación (VERIFICA). Item COMPAD: A heterogeneous cache-scratchpad CPU architecture with data layout compaction for embedded loop-dominated applications(Journal of Systems Architecture, 2023) Marinelli, Tommaso; Gómez Pérez, José Ignacio; Tenllado Van Der Reijden, Christian Tomás; Catthoor, FranckyThe growing trend of pervasive computing has consolidated the everlasting need for power efficient devices. The conventional cache subsystem of general-purpose CPUs, while being able to adapt to many use cases, suffers from energy inefficiencies in some scenarios. It is well-known by now in the academic literature that the utilization of a scratchpad memory (SPM) can help reducing the overall energy consumption of embedded systems. This work proposes a hybrid cache-SPM architecture with support logic for semi-transparent data management and spatial locality improvement. Selected data are transferred and stored in the SPM in a compact form using dynamic layout transformation. As a second major contribution, we introduce a methodology to identify memory access sequences that make an inefficient use of the cache, marking them as candidates to be moved to an SPM of constrained space. The methodology does not require access to the source code of the target applications, relying on binary instrumentation and offline profiling. The resulting mapping policies have been tested on a simulated system, showing a mean memory dynamic energy reduction of 43% and a mean speed gain of 13% with a representative benchmark set.Item Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices(ACM Transactions on Embedded Computing Systems (TECS), 2022) Komalan, Manu; Gupta, Mohit; Catthoor, Francky; Gómez Pérez, José Ignacio; Marinelli, Tommaso; Tenllado Van Der Reijden, Christian TomásAs the technology scaling advances, limitations of traditional memories in terms of density and energy become more evident. Modern caches occupy a large part of a CPU physical size and high static leakage poses a limit to the overall efficiency of the systems, including IoT/edge devices. Several alternatives to CMOS SRAM memories have been studied during the past few decades, some of which already represent a viable replacement for different levels of the cache hierarchy. One of the most promising technologies is the spin-transfer torque magnetic RAM (STT-MRAM), due to its small basic cell design, almost absent static current and nonvolatility as an added value. However, nothing comes for free, and designers will have to deal with other limitations, such as the higher latencies and dynamic energy consumption for write operations compared to reads. The goal of this work is to explore several microarchitectural parameters that may overcome some of those drawbacks when using STT-MRAM as last-level cache (LLC) in embedded devices. Such parameters include: number of cache banks, number of miss status handling registers (MSHRs) and write buffer entries, presence of hardware prefetchers. We show that an effective tuning of those parameters may virtually remove any performance loss while saving more than 60% of the LLC energy on average. The analysis is then extended comparing the energy results from calibrated technology models with data obtained with freely available tools, highlighting the importance of using accurate models for architectural exploration.Item Time-Dependent Electromigration Modeling for Workload-Aware Design-Space Exploration in STT-MRAM(IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022) Mayahinia, Mahta; Tahoori, Mehdi; Komalan, Manu Perumkunnil; Zahedmanesh, Houman; Croes, Kristof; Marinelli, Tommaso; Gómez Pérez, José Ignacio; Evenblij, Timon; Kar, Gouri Sankar; Catthoor, FranckyElectromigration (EM) has been known as a reliability threatening factor for back-end-of-the-line interconnects. Spin Transfer Torque Magnetic RAM (STT-MRAM) is an emerging non-volatile memory that has gained a lot of attention in recent years. However, relatively large operational current magnitude is a challenge for this technology, and hence, EM can be a potential reliability concern, even for the signal lines of this memory. A workload-aware EM modeling needs to capture time-dependent current density in the memory signal lines, and to be able to predict the effect of the EM phenomenon on the interconnect for its entire lifetime. In this work, we present methods to effectively model the workload-dependent EM-induced mean time to failure (MTTF) in typical STT-MRAM arrays under a variety of realistic workloads. This allows performing the design space exploration to co-optimize reliability and other design metrics.Item Spatio-temporal resolution of irradiance samples in machine learning approaches for irradiance forecasting(IEEE access, 2020) Eschenbach, Annette; Yepes, Guillermo; Tenllado Van Der Reijden, Christian Tomás; Gómez Pérez, José Ignacio; Piñuel Moreno, Luis; Zarzalejo, Luiis F.; Wilbert, StefanImproving short term solar irradiance forecasting is crucial to increase the market share of the solar energy production. This paper analyzes the impact of using spatially distributed irradiance sensors as inputs to four machine learning algorithms: ARX, NN, RRF and RT. We used data from two different sensor networks for our experiments, the NREL dataset that includes data from 17 sensors that cover a 1 km^2 area and the InfoRiego dataset which includes data from 50 sensors that cover an area of 94 Km^2. Several studies have been published that use these datasets individually, to the author knowledge this is the flrst work that evaluates the influence of the spatially distributed data across a range from 0.5 to 17 sensors per km^2. We show that all of algorithms evaluated are able to take advantage of the data from the surroundings, from the very short forecast horizons of 10s up to a few hours, and that the wind direction and intensity plays an important role in the optimal distribution of the network and its density. We show that these machine learning methods are more effective on the short horizons when data is obtained from a dense enough network to capture the cloud movements in the prediction interval, and that in those cases complex non-linear models give better results. On the other hand, if only a sparse network is available, the simpler linear models give better results. The skills obtained with the models under test range from 13% to 70%, depending on the sensor network density, time resolution and lead time.- Project number: 151
Item Virtualización de Laboratorios de la Materia Sistemas Operativos y Redes mediante Contenedores(2023) Sánchez-Elez Martín, Marcos; Pardines Lence, María Inmaculada; Gómez Pérez, José Ignacio; Moreno Vozmediano, Rafael Aurelio; Olcoz Herrero, Katzalin; Risco Martín, José Luis; Ruiz Gallego-Largo, Rafael; Soria Jiménez, David; Miñana Ropero, María Guadalupe; Molina Prego, María Del Carmen; Sánchez Muñoz, Eduardo