An extremely pipelined FPGA implementation of a lossy hyperspectral image compression algorithm

Abstract

Segmented and pipelined execution has been a staple of computing for the past decades. Operations over different values can be carried out at the same time speeding up computations. Hyperspectral image compression sequentially processes samples, exploiting local redundancies to generate a predictable data stream that can be compressed. In this paper, we take advantage of a Low Complexity Predictive Lossy Compression algorithm which can be executed over an extremely long pipeline of hundreds of stages. We can avoid most stalls and maintain throughput close to the theoretical maximum. The different steps operate over integers with simple arithmetic operations, so they are specially well-suited for our FPGA implementation. Results on a Virtex-7 show a maximum frequency of over 300Mhz for a throughput of over 290MB/s, with a space-qualified Virtex5 reaching 258MHz, being 5 times as fast as the previous FPGA designs. This shows that a modular pipelined approach is beneficial for these kinds of compression algorithms.