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High-throughput architecture for post-quantum DME cryptosystem

dc.contributor.authorImaña Pascual, José Luis
dc.contributor.authorLuengo Velasco, Ignacio
dc.date.accessioned2023-06-16T15:26:40Z
dc.date.available2023-06-16T15:26:40Z
dc.date.issued2020-11
dc.description© 2020 Elsevier This work has been supported by the Spanish MINECO and CM under grants S2018/TCS-4423, TIN 2015-65277-R and RTI2018-093684-B-I00.
dc.description.abstractQuantum computers have the potential to solve difficult mathematical problems efficiently, therefore meaning an important threat to Public-Key Cryptography (PKC) if large-scale quantum computers are ever built. The goal of Post-Quantum Cryptography (PQC) is to develop cryptosystems that are secure against both classical and quantum computers. DME is a new proposal of quantum-resistant PKC algorithm that was presented for NIST PQC Standardization competition in order to set the next-generation of cryptography standards. DME is a multivariate public key, signature and Key Encapsulation Mechanism (KEM) system based on a new construction of the central maps, that allows the polynomials of the public key to be of an arbitrary degree. In this paper, a high-throughput pipelined architecture of DME is presented and hardware implementations over Xilinx FPGAs have been performed. Experimental results show that the architecture here presented exhibits the lowest execution time and highest throughput when it is compared with other PQC multivariate implementations given in the literature.
dc.description.departmentSección Deptal. de Arquitectura de Computadores y Automática (Físicas)
dc.description.facultyFac. de Ciencias Físicas
dc.description.refereedTRUE
dc.description.sponsorshipMinisterio de Ciencia e Innovación (MICINN)/FEDER
dc.description.sponsorshipMinisterio de Economía y Competitividad (MINECO)
dc.description.sponsorshipComunidad de Madrid
dc.description.statuspub
dc.eprint.idhttps://eprints.ucm.es/id/eprint/62793
dc.identifier.doi10.1016/j.vlsi.2020.07.002
dc.identifier.issn0167-9260
dc.identifier.officialurlhttp://dx.doi.org/10.1016/j.vlsi.2020.07.002
dc.identifier.relatedurlhttps://www.sciencedirect.com
dc.identifier.urihttps://hdl.handle.net/20.500.14352/6687
dc.journal.titleIntegration-the VLSI journal
dc.language.isoeng
dc.page.final121
dc.page.initial114
dc.publisherElsevier
dc.relation.projectIDRTI2018-093684-B-I00
dc.relation.projectIDTIN 2015-65277-R
dc.relation.projectIDCABAHLA-CM (S2018/TCS-4423)
dc.rightsAtribución-NoComercial-SinDerivadas 3.0 España
dc.rights.accessRightsopen access
dc.rights.urihttps://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subject.cdu004.8
dc.subject.keywordSignature
dc.subject.keywordHardware
dc.subject.keywordRainbow
dc.subject.keywordPast-quantum cryptography
dc.subject.keywordMultivariate public-key cryptosystem
dc.subject.keywordDME
dc.subject.keywordFinite field
dc.subject.keywordField-Programmable Gate Array (FPGA)
dc.subject.keywordPipelined
dc.subject.keywordHigh-throughput
dc.subject.ucmInteligencia artificial (Informática)
dc.subject.unesco1203.04 Inteligencia Artificial
dc.titleHigh-throughput architecture for post-quantum DME cryptosystem
dc.typejournal article
dc.volume.number75
dspace.entity.typePublication
relation.isAuthorOfPublication1c42e591-4b3d-4cb4-919d-01813fa4cd36
relation.isAuthorOfPublication2e3a1e05-10b8-4ea5-9fcc-b53bbb0168ce
relation.isAuthorOfPublication.latestForDiscovery1c42e591-4b3d-4cb4-919d-01813fa4cd36

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