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HUB meets posit: arithmetic units implementation

dc.contributor.authorMurillo Montero, Raúl
dc.contributor.authorHormigo, Javier
dc.contributor.authorDel Barrio García, Alberto Antonio
dc.contributor.authorBotella Juan, Guillermo
dc.date.accessioned2024-04-05T18:51:46Z
dc.date.available2024-04-05T18:51:46Z
dc.date.issued2024-01
dc.description2023 Acuerdos transformativos CRUE
dc.description.abstractThe posit (TM) format was introduced in 2017 as an alternative to replacing the widespread IEEE 754. Posit arithmetic provides reproducible results across platforms and possesses tapered accuracy, among other improvements. Nevertheless, despite the advantages provided by such a format, their functional units are not as competitive as the IEEE 754 ones yet. The HUB approach was presented in 2016 to reduce the hardware cost of floating-point units. In this brief, we present HUB posit, a new format to mitigate the hardware overhead of posit units. Results show that it is possible to reach up to 15% and 12% in terms of area-delay product for adders and multipliers, respectively, while maintaining a similar level of accuracy. In addition, synthesis results show that HUB posit units are able to reach higher frequencies than conventional ones.
dc.description.departmentDepto. de Arquitectura de Computadores y Automática
dc.description.facultyFac. de Ciencias Físicas
dc.description.facultyFac. de Informática
dc.description.refereedTRUE
dc.description.sponsorshipMinisterio de Ciencia e Innovación (España)
dc.description.sponsorshipAgencia Estatal de Investigación
dc.description.sponsorshipFundación BBVA
dc.description.sponsorshipComunidad de Madrid
dc.description.sponsorshipFondo Europeo de Desarrollo Regional (FEDER)
dc.description.sponsorshipJunta de Andalucía
dc.description.statuspub
dc.identifier.doi10.1109/TCSII.2023.3307488
dc.identifier.essn1558-3791
dc.identifier.issn1549-7747
dc.identifier.officialurlhttps://ieeexplore.ieee.org/document/10226419
dc.identifier.urihttps://hdl.handle.net/20.500.14352/102793
dc.issue.number1
dc.journal.titleIEEE Transactions on Circuits and Systems II: Express Briefs
dc.language.isoeng
dc.page.final444
dc.page.initial440
dc.publisherIEEE
dc.relation.projectIDPID2019-105396RB-I00
dc.relation.projectIDinfo:eu-repo/grantAgreement/MICINN/PID2021-123041OB-I00
dc.relation.projectIDPR2003_20/01
dc.relation.projectIDS2018/TCS-4423
dc.relation.projectIDUMA20-FEDERJA-059
dc.relation.projectIDP18-FR-3130
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internationalen
dc.rights.accessRightsopen access
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subject.cdu004
dc.subject.keywordPosit arithmetic
dc.subject.keywordHUB format
dc.subject.keywordAdder
dc.subject.keywordMultiplier
dc.subject.ucmInformática (Informática)
dc.subject.unesco1203 Ciencia de Los Ordenadores
dc.titleHUB meets posit: arithmetic units implementation
dc.typejournal article
dc.type.hasVersionVoR
dc.volume.number71
dspace.entity.typePublication
relation.isAuthorOfPublicationd08b5d10-697d-4104-9cb1-1fc7db6ecec6
relation.isAuthorOfPublication53f86d34-b560-4105-a0bc-a8d1994153ab
relation.isAuthorOfPublicationf94b32c6-dff7-4d98-9c7a-00aad48c2b6a
relation.isAuthorOfPublication.latestForDiscoveryd08b5d10-697d-4104-9cb1-1fc7db6ecec6

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