HUB meets posit: arithmetic units implementation
dc.contributor.author | Murillo Montero, Raúl | |
dc.contributor.author | Hormigo, Javier | |
dc.contributor.author | Del Barrio García, Alberto Antonio | |
dc.contributor.author | Botella Juan, Guillermo | |
dc.date.accessioned | 2024-04-05T18:51:46Z | |
dc.date.available | 2024-04-05T18:51:46Z | |
dc.date.issued | 2024-01 | |
dc.description | 2023 Acuerdos transformativos CRUE | |
dc.description.abstract | The posit (TM) format was introduced in 2017 as an alternative to replacing the widespread IEEE 754. Posit arithmetic provides reproducible results across platforms and possesses tapered accuracy, among other improvements. Nevertheless, despite the advantages provided by such a format, their functional units are not as competitive as the IEEE 754 ones yet. The HUB approach was presented in 2016 to reduce the hardware cost of floating-point units. In this brief, we present HUB posit, a new format to mitigate the hardware overhead of posit units. Results show that it is possible to reach up to 15% and 12% in terms of area-delay product for adders and multipliers, respectively, while maintaining a similar level of accuracy. In addition, synthesis results show that HUB posit units are able to reach higher frequencies than conventional ones. | |
dc.description.department | Depto. de Arquitectura de Computadores y Automática | |
dc.description.faculty | Fac. de Ciencias Físicas | |
dc.description.faculty | Fac. de Informática | |
dc.description.refereed | TRUE | |
dc.description.sponsorship | Ministerio de Ciencia e Innovación (España) | |
dc.description.sponsorship | Agencia Estatal de Investigación | |
dc.description.sponsorship | Fundación BBVA | |
dc.description.sponsorship | Comunidad de Madrid | |
dc.description.sponsorship | Fondo Europeo de Desarrollo Regional (FEDER) | |
dc.description.sponsorship | Junta de Andalucía | |
dc.description.status | pub | |
dc.identifier.doi | 10.1109/TCSII.2023.3307488 | |
dc.identifier.essn | 1558-3791 | |
dc.identifier.issn | 1549-7747 | |
dc.identifier.officialurl | https://ieeexplore.ieee.org/document/10226419 | |
dc.identifier.uri | https://hdl.handle.net/20.500.14352/102793 | |
dc.issue.number | 1 | |
dc.journal.title | IEEE Transactions on Circuits and Systems II: Express Briefs | |
dc.language.iso | eng | |
dc.page.final | 444 | |
dc.page.initial | 440 | |
dc.publisher | IEEE | |
dc.relation.projectID | PID2019-105396RB-I00 | |
dc.relation.projectID | info:eu-repo/grantAgreement/MICINN/PID2021-123041OB-I00 | |
dc.relation.projectID | PR2003_20/01 | |
dc.relation.projectID | S2018/TCS-4423 | |
dc.relation.projectID | UMA20-FEDERJA-059 | |
dc.relation.projectID | P18-FR-3130 | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 International | en |
dc.rights.accessRights | open access | |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | |
dc.subject.cdu | 004 | |
dc.subject.keyword | Posit arithmetic | |
dc.subject.keyword | HUB format | |
dc.subject.keyword | Adder | |
dc.subject.keyword | Multiplier | |
dc.subject.ucm | Informática (Informática) | |
dc.subject.unesco | 1203 Ciencia de Los Ordenadores | |
dc.title | HUB meets posit: arithmetic units implementation | |
dc.type | journal article | |
dc.type.hasVersion | VoR | |
dc.volume.number | 71 | |
dspace.entity.type | Publication | |
relation.isAuthorOfPublication | d08b5d10-697d-4104-9cb1-1fc7db6ecec6 | |
relation.isAuthorOfPublication | 53f86d34-b560-4105-a0bc-a8d1994153ab | |
relation.isAuthorOfPublication | f94b32c6-dff7-4d98-9c7a-00aad48c2b6a | |
relation.isAuthorOfPublication.latestForDiscovery | d08b5d10-697d-4104-9cb1-1fc7db6ecec6 |
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