Static and Dynamic Tests on a 40-nm Commercial SRAM under Muons and Neutrons

dc.contributor.authorFabero Jiménez, Juan Carlos
dc.contributor.authorFranco Peláez, Francisco Javier
dc.contributor.authorMecha López, Hortensia
dc.contributor.authorMohammadreza Rezaei
dc.contributor.authorAdrian D. Hillier
dc.contributor.authorJames S. Lord
dc.contributor.authorStephen P. Cottrell
dc.contributor.authorAndrea Colangeli
dc.contributor.authorNicola Fonnesu
dc.contributor.authorGuglielmo Pagano
dc.contributor.authorJuan antonio Clemente
dc.contributor.authorClemente Barreira, Juan Antonio
dc.date.accessioned2026-01-14T14:18:56Z
dc.date.available2026-01-14T14:18:56Z
dc.date.issued2026-01
dc.description.abstractThe single-bit and multiple-cell upset cross sections for positive and negative muons and 14-MeV neutrons of a commercial 40-nm CMOS SRAM have been experimentally determined in static and dynamic modes. In the case of the muons, the momentum with the highest cross section was predicted by EVA, a custom simulation tool, in spite of not having the characteristics of the chemicals used to build the device and the printed circuit boards. Positive muons only cause single-bit upsets, while negative muons and neutrons also induce multiple cell upsets of various multiplicities. The number of multiple events was determined by using LELAPE, a tool that explores the statistical properties of the set of data. In all the tests, the static cross-section was on the same order as the dynamic one, or even higher. Besides, in the case of muons, the cross section is not negligible at standard power supply voltages. These phenomena are attributed to a side effect of the internal circuitry added by the manufacturer to adapt the bias voltage and to minimize the power consumption.
dc.description.departmentDepto. de Estructura de la Materia, Física Térmica y Electrónica
dc.description.departmentDepto. de Arquitectura de Computadores y Automática
dc.description.facultyFac. de Informática
dc.description.refereedTRUE
dc.description.sponsorshipMinisterio de Ciencia, Innovación y Universidades
dc.description.sponsorshipUnión Europea, 2020 research and innovation program
dc.description.statusinpress
dc.identifier.doi10.1109/TNS.2026.3652620
dc.identifier.officialurlhttps://ieeexplore.ieee.org/document/11345248
dc.identifier.urihttps://hdl.handle.net/20.500.14352/130223
dc.journal.titleIEEE Transactions on Nuclear Science
dc.language.isoeng
dc.publisherIEEE
dc.relation.projectIDPID2020-112916GB-I00, “RESHYLIENCE”
dc.relation.projectIDGrant agreement No 101008126, "RADNEXT"
dc.rightsAttribution-ShareAlike 4.0 Internationalen
dc.rights.accessRightsrestricted access
dc.rights.urihttp://creativecommons.org/licenses/by-sa/4.0/
dc.subject.keywordMuons, Multiple Cell Upset (MCU), neutrons, Single Bit Upset (SBU), Single Event Effect (SEE), Single Event Upset (SEU), Static Random Access Memory (SRAM)
dc.subject.ucmElectrónica (Informática)
dc.subject.ucmElectrónica (Física)
dc.subject.ucmCircuitos integrados
dc.subject.ucmCircuitos integrados
dc.subject.unesco2203.07 Circuitos Integrados
dc.subject.unesco2501.15 Rayos Cósmicos
dc.titleStatic and Dynamic Tests on a 40-nm Commercial SRAM under Muons and Neutrons
dc.typejournal article
dc.type.hasVersionAM
dspace.entity.typePublication
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relation.isAuthorOfPublication662ba05f-c2fc-4ad7-9203-36924c80791a
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relation.isAuthorOfPublication.latestForDiscoverye7a0fb66-7ed6-4ed0-9b76-bc3b0fa54d04

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