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Big-PERCIVAL: Exploring the Native Use of 64-Bit Posit Arithmetic in Scientific Computing

dc.contributor.authorMallasén Quintana, David
dc.contributor.authorDel Barrio García, Alberto Antonio
dc.contributor.authorPrieto Matías, Manuel
dc.date.accessioned2024-03-20T14:47:08Z
dc.date.available2024-03-20T14:47:08Z
dc.date.issued2024
dc.description.abstractThe accuracy requirements in many scientific computing workloads result in the use of double-precision floating-point arithmetic in the execution kernels. Nevertheless, emerging real-number representations, such as posit arithmetic, show promise in delivering even higher accuracy in such computations. In this work, we explore the native use of 64-bit posits in a series of numerical benchmarks and compare their timing performance, accuracy and hardware cost to IEEE 754 doubles. In addition, we also study the conjugate gradient method for numerically solving systems of linear equations in real-world applications. For this, we extend the PERCIVAL RISC-V core and the Xposit custom RISC-V extension with posit64 and quire operations. Results show that posit64 can obtain up to 4 orders of magnitude lower mean square error than doubles. This leads to a reduction in the number of iterations required for convergence in some iterative solvers. However, leveraging the quire accumulator register can limit the order of some operations such as matrix multiplications. Furthermore, detailed FPGA and ASIC synthesis results highlight the significant hardware cost of 64-bit posit arithmetic and quire. Despite this, the large accuracy improvements achieved with the same memory bandwidth suggest that posit arithmetic may provide a potential alternative representation for scientific computing.
dc.description.departmentDepto. de Arquitectura de Computadores y Automática
dc.description.facultyFac. de Informática
dc.description.refereedTRUE
dc.description.statusinpress
dc.identifier.doi10.1109/TC.2024.3377890
dc.identifier.relatedurlhttps://github.com/artecs-group/PERCIVAL
dc.identifier.urihttps://hdl.handle.net/20.500.14352/102427
dc.journal.titleIEEE Transactions on Computers
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internationalen
dc.rights.accessRightsopen access
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subject.keywordArithmetic
dc.subject.keywordPosit
dc.subject.keywordIEEE-754
dc.subject.keywordFloating point
dc.subject.keywordScientific computing
dc.subject.keywordRISC-V
dc.subject.keywordCPU
dc.subject.keywordMatrix multiplication
dc.subject.keywordPolyBench
dc.subject.ucmHardware
dc.subject.unesco3304.06 Arquitectura de Ordenadores
dc.titleBig-PERCIVAL: Exploring the Native Use of 64-Bit Posit Arithmetic in Scientific Computing
dc.typejournal article
dspace.entity.typePublication
relation.isAuthorOfPublication067c0c14-77ee-44bc-9133-2905f3678b6d
relation.isAuthorOfPublication53f86d34-b560-4105-a0bc-a8d1994153ab
relation.isAuthorOfPublication5d3f6717-1495-4217-853c-8c9c75d56620
relation.isAuthorOfPublication.latestForDiscovery067c0c14-77ee-44bc-9133-2905f3678b6d

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