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Flexible system software scheduling for asymmetric multicore systems with PMCSched: A case for Intel Alder Lake

dc.contributor.authorBilbao, Carlos
dc.contributor.authorSáez Alcaide, Juan Carlos
dc.contributor.authorPrieto Matías, Manuel
dc.date.accessioned2025-01-15T14:25:24Z
dc.date.available2025-01-15T14:25:24Z
dc.date.issued2023
dc.description.abstractAsymmetric multicore processors (AMPs) couple high-performance big cores and power-efficient small ones, all exposing a shared instruction set architecture to software, but with different microarchitectural features. The energy efficiency benefits of AMPs, together with the general-purpose nature of the various cores, have led hardware manufacturers to build commercial AMP-based products, first for the mobile and embedded domains, and more recently, for the desktop market segment, as with the Intel Alder Lake processor family. This trend indicates that AMPs may become a solid and more energy efficient replacement for symmetric multicores in a wide range of application domains. Previous research has demonstrated that the system software can substantially improve scheduling—critical to get the most out of heterogeneous cores—by leveraging hardware facilities that are directly managed by the OS, such as performance monitoring counters, or the recently introduced Intel Thread Director technology. Unfortunately, the OS-level support enabling access to these hardware facilities may often take a long time to be adopted in operating systems, or may come in forms that make its utilization challenging from specific levels of the system software stack, especially in production systems. To fill this gap, we propose PMCSched, an open-source framework enabling rapid development and evaluation of custom scheduling-related support in the Linux kernel. PMCSched greatly simplifies the design and implementation of a wide range of scheduling policies for multicore systems that operate at different system software layers without requiring to patch the kernel. To demonstrate the potential of our framework, we conduct a set of experimental case studies on asymmetry-aware scheduling for Intel Alder Lake processors.
dc.description.departmentDepto. de Arquitectura de Computadores y Automática
dc.description.facultyFac. de Informática
dc.description.refereedTRUE
dc.description.sponsorshipGobierno de España
dc.description.sponsorshipComunidad de Madrid
dc.description.sponsorshipUnión Europea (Fondo Europeo de Desarrollo Regional)
dc.description.statuspub
dc.identifier.citationBilbao C, Saez JC, Prieto-Matias M. Flexible system software scheduling for asymmetric multicore systems with PMCSched: A case for Intel Alder Lake. Concurrency Computat Pract Exper. 2023; 35(25):e7814. doi: 10.1002/cpe.7814
dc.identifier.doi10.1002/cpe.7814
dc.identifier.essn1532-0634
dc.identifier.issn1532-0626
dc.identifier.officialurlhttps://doi.org/10.1002/cpe.7814
dc.identifier.relatedurlhttps://onlinelibrary.wiley.com/doi/full/10.1002/cpe.7814
dc.identifier.urihttps://hdl.handle.net/20.500.14352/114489
dc.issue.number25
dc.journal.titleConcurrency and Computation: Practice and Experience
dc.language.isoeng
dc.page.initiale7814
dc.publisherWiley
dc.relation.projectIDinfo:eu-repo/grantAgreement/AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2021-2023/PID2021-126576NB-I00/ES/SOFTWARE DE SISTEMA PARA ARQUITECTURAS Y APLICACIONES DE NUEVA GENERACION
dc.relation.projectIDS2018/TCS-4423
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internationalen
dc.rights.accessRightsopen access
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subject.keywordasymmetric multicore processors
dc.subject.keywordIntel Alder Lake
dc.subject.keywordIntel Thread Director
dc.subject.keywordLinux kernel
dc.subject.keywordLoop scheduling
dc.subject.keywordOpenMP
dc.subject.keywordOperating systems
dc.subject.keywordRuntime systems
dc.subject.keywordScheduling
dc.subject.ucmHardware
dc.subject.ucmSistemas operativos (Ordenadores)
dc.subject.ucmSoftware
dc.subject.unesco3304 Tecnología de Los Ordenadores
dc.titleFlexible system software scheduling for asymmetric multicore systems with PMCSched: A case for Intel Alder Lake
dc.typejournal article
dc.type.hasVersionVoR
dc.volume.number35
dspace.entity.typePublication
relation.isAuthorOfPublication5a9b186f-f010-47e3-b598-040d7f5dc5ba
relation.isAuthorOfPublication5d3f6717-1495-4217-853c-8c9c75d56620
relation.isAuthorOfPublication.latestForDiscovery5a9b186f-f010-47e3-b598-040d7f5dc5ba

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