Single event effects on digital integrated circuits: origins and mitigation techniques
dc.book.title | 2007 IEEE International Symposium on Industrial Electronics | |
dc.conference.date | 04/06/2007-07/06/2007 | |
dc.conference.place | Vigo (Spain) | |
dc.conference.title | Industrial Electronics, 2007. ISIE 2007. IEEE International Symposium on | |
dc.contributor.author | Velazco, Raoul | |
dc.contributor.author | Franco Peláez, Francisco Javier | |
dc.date.accessioned | 2023-06-20T13:41:19Z | |
dc.date.available | 2023-06-20T13:41:19Z | |
dc.date.issued | 2007-06-02 | |
dc.description | © 2007 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/ republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works. IEEE International Symposium on Industrial Electronics (2007. Vigo) | |
dc.description.abstract | New generation electronic devices have become more and more sensitive to the effects of the natural radiation coming from the surrounding environment. These radiation sources are cosmic rays and radioactive impurities, able to corrupt the content of memory cells or to induce transient pulses in combinational logic. The growing sensitivity seems to be related to two main factors: the lower and lower charge needed to define the logic levels in advanced devices and the increasing number of basic components inside the modern integrated circuits. In this paper, are described state-of-art techniques to mitigate these effects as well as typical tests to verify the radiation-tolerance of the devices and/or systems. | |
dc.description.department | Depto. de Estructura de la Materia, Física Térmica y Electrónica | |
dc.description.faculty | Fac. de Ciencias Físicas | |
dc.description.refereed | TRUE | |
dc.description.status | pub | |
dc.eprint.id | https://eprints.ucm.es/id/eprint/28903 | |
dc.identifier.doi | 10.1109/ISIE.2007.4375148 | |
dc.identifier.isbn | 978-1-4244-0755-2 (E-ISBN) ; 978-1-4244-0754-5 (Print ISBN) | |
dc.identifier.officialurl | http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=4375148 | |
dc.identifier.uri | https://hdl.handle.net/20.500.14352/53389 | |
dc.language.iso | eng | |
dc.page.final | 3327 | |
dc.page.initial | 3322 | |
dc.page.total | 6 | |
dc.publication.place | Piscataway | |
dc.publisher | IEEE | |
dc.rights.accessRights | open access | |
dc.subject.cdu | 537.8 | |
dc.subject.keyword | Digital integrated circuits | |
dc.subject.keyword | Radiation hardening (electronics) | |
dc.subject.keyword | Combinational logic | |
dc.subject.keyword | Cosmic rays | |
dc.subject.keyword | Electronic devices | |
dc.subject.keyword | Induce transient pulses | |
dc.subject.keyword | Memory cells | |
dc.subject.keyword | Radiation sources | |
dc.subject.keyword | Radioactive impurities | |
dc.subject.keyword | Single event effects | |
dc.subject.keyword | Circuit testing | |
dc.subject.keyword | Failure analysis | |
dc.subject.keyword | Impurities | |
dc.subject.keyword | Laboratories | |
dc.subject.keyword | Logic circuits | |
dc.subject.keyword | Logic devices | |
dc.subject.keyword | Single event upset | |
dc.subject.keyword | System testing | |
dc.subject.ucm | Electrónica (Física) | |
dc.subject.ucm | Radiactividad | |
dc.title | Single event effects on digital integrated circuits: origins and mitigation techniques | |
dc.type | book part | |
dspace.entity.type | Publication | |
relation.isAuthorOfPublication | 662ba05f-c2fc-4ad7-9203-36924c80791a | |
relation.isAuthorOfPublication.latestForDiscovery | 662ba05f-c2fc-4ad7-9203-36924c80791a |
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