Rapid thermal annealing effects on the electrical behavior of plasma oxidized silicon/silicon nitride stacks gate insulators

Abstract

We present a comparative study of the electrical and structural characteristics of metal-insulator-semiconductor (MIS) devices using SiN1.55:H or SiN1.55:H/SiOx stacks as gate dielectrics, with the aim of improving the thermal stability of the SiN1.55:H/Si interface. The dielectrics were grown on Si by the electron cyclotron resonance plasma method. The stacks were produced by plasma oxidation of the Si surface, resulting in a thin layer of SiOx (PO-SiOx), followed by deposition of the SiN1.55:H layer. Afterwards, the samples were rapid thermally annealed (RTA) at temperatures ranging from 300 to 1000degreesC. Some representative samples were studied by Fourier transform infrared spectroscopy to characterize the bonding structure of the SiN1.55:H/PO-SiOx stack and its evolution with the annealing temperature. The results were in good agreement with the well known model for suboxide evolution with the temperature: the formation of highly defective nanocrystalline Si clusters inside a high quality SiO2 matrix. This process takes place for RTA temperatures higher than 700degreesC. This model also explains the results derived from C-V measurements, which show improvement of the PO-SiOx/Si interface as a result of the formation of the high quality SiO2 matrix. Additionally, the thermal stability improved with respect to the SiN1.55:H/Si interface, which suffers significant degradation when annealed above 600degreesC, while devices made with the stacks are able to hold annealing temperatures up to 900degreesC. On the other hand, the formation of nc-Si results in degradation of the reliability of the MIS devices.