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Statistical Anomalies of Bitflips in SRAMs to Discriminate SBUs from MCUs

dc.contributor.authorClemente Barreira, Juan Antonio
dc.contributor.authorFranco Peláez, Francisco Javier
dc.contributor.authorVilla, Francesca
dc.contributor.authorBaylac, Maud
dc.contributor.authorRey, Solenne
dc.contributor.authorMecha López, Hortensia
dc.contributor.authorAgapito Serrano, Juan Andrés
dc.contributor.authorPuchner, Helmut
dc.contributor.authorHubert, Guillaume
dc.contributor.authorVelazco, Raoul
dc.date.accessioned2023-06-17T23:52:56Z
dc.date.available2023-06-17T23:52:56Z
dc.date.issued2016-08
dc.description“© © 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.”
dc.description.abstractRecently, the occurrence of multiple events in static tests has been investigated by checking the statistical distribution of the difference between the addresses of the words containing bitflips. That method has been successfully applied to Field Programmable Gate Arrays (FPGAs) and the original authors indicate that it is also valid for SRAMs. This paper presents a modified methodology that is based on checking the XORed addresses with bitflips, rather than on the difference. Irradiation tests on CMOS 130 & 90 nm SRAMs with 14-MeV neutrons have been performed to validate this methodology. Results in high-altitude environments are also presented and cross-checked with theoretical predictions. In addition, this methodology has also been used to detect modifications in the organization of said memories. Theoretical predictions have been validated with actual data provided by the manufacturer.
dc.description.departmentDepto. de Arquitectura de Computadores y Automática
dc.description.facultyFac. de Informática
dc.description.refereedTRUE
dc.description.sponsorshipMinisterio de Ciencia e Innovación (MICINN)
dc.description.sponsorshipMobility grant “José Castillejo” for professors and researchers
dc.description.sponsorshipUCM-BSCH
dc.description.statuspub
dc.eprint.idhttps://eprints.ucm.es/id/eprint/39047
dc.identifier.doi10.1109/TNS.2016.2551263
dc.identifier.issn0018-9499
dc.identifier.officialurlhttp://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7508969
dc.identifier.urihttps://hdl.handle.net/20.500.14352/18959
dc.issue.number4
dc.journal.titleIEEE Transactions on Nuclear Science
dc.language.isoeng
dc.page.final2094
dc.page.initial2087
dc.publisherIEEE
dc.relation.projectIDAYA2009- 13300-C03
dc.relation.projectIDTIN2013-40968-P
dc.rights.accessRightsopen access
dc.subject.cdu004.25
dc.subject.cdu004.33
dc.subject.keywordSRAMs
dc.subject.keywordSingle event upsets
dc.subject.keywordMultiple cell upsets
dc.subject.keywordNeutron tests
dc.subject.ucmHardware
dc.titleStatistical Anomalies of Bitflips in SRAMs to Discriminate SBUs from MCUs
dc.typejournal article
dc.volume.number63
dspace.entity.typePublication
relation.isAuthorOfPublication919b239d-a500-4adb-aacf-00206a2c1512
relation.isAuthorOfPublication662ba05f-c2fc-4ad7-9203-36924c80791a
relation.isAuthorOfPublication2363ed06-f92b-4c10-bd9a-87ac2fcce006
relation.isAuthorOfPublication.latestForDiscovery919b239d-a500-4adb-aacf-00206a2c1512

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