Improving Circuit Performance with Multispeculative Additive Trees in High-Level Synthesis

Simple item page
dc.contributor.authorDel Barrio García, Alberto Antonio
dc.contributor.authorHermida Correa, Román
dc.contributor.authorOgrenci Memik, Seda
dc.contributor.authorMendías Cuadros, José Manuel
dc.contributor.authorMolina Prego, María Del Carmen
dc.date.accessioned2023-06-19T14:54:50Z
dc.date.available2023-06-19T14:54:50Z
dc.date.issued2014-11
dc.description.abstractThe recent introduction of Variable Latency Functional Units (VLFUs) has broadened the design space of HighLevel Synthesis (HLS). Nevertheless their use is restricted to only few operators in the datapaths because the number of cases to control grows exponentially. In this work an instance of VLFUs is described, and based on its structure, the average latency of tree structures is improved. Multispeculative Functional Units (MSFUs) are arithmetic Functional Units that operate using several predictors for the carry signal. In spite of utilizing more than a predictor, none or only one additional very short cycle is enough for producing the correct result in the majority of the cases. In this paper our proposal takes advantage of multispeculation in order to increase the performance of tree structures with a negligible area penalty. By judiciously introducing these structures into computation trees, it will only be necessary to predict the carry signals in certain selected nodes, thus minimizing the total number of predictions and the number of operations that can potentially mispredict. Hence, the average latency will be diminished and thus performance will be increased. Our experiments show that it is possible to improve 26% execution time. Furthermore, our flow outperforms previous approaches with Speculative FUs.
dc.description.departmentDepto. de Arquitectura de Computadores y Automática
dc.description.facultyFac. de Informática
dc.description.refereedFALSE
dc.description.statuspub
dc.eprint.idhttps://eprints.ucm.es/id/eprint/31011
dc.identifier.doi10.1016/j.mejo.2014.06.005
dc.identifier.issn0026-2692
dc.identifier.officialurlhttp://dx.doi.org/10.1016/j.mejo.2014.06.005
dc.identifier.urihttps://hdl.handle.net/20.500.14352/34743
dc.issue.number11
dc.journal.titleMicroelectronics Journal
dc.language.isoeng
dc.page.final1479
dc.page.initial1470
dc.publisherElsevier
dc.rights.accessRightsopen access
dc.subject.cdu621.3.049.77
dc.subject.keywordVariable-Latency Functional Units
dc.subject.keywordspeculation
dc.subject.keywordadditive operation trees
dc.subject.keywordHigh-Level Synthesis
dc.subject.ucmInformática (Informática)
dc.subject.ucmCircuitos integrados
dc.subject.unesco1203.17 Informática
dc.subject.unesco2203.07 Circuitos Integrados
dc.titleImproving Circuit Performance with Multispeculative Additive Trees in High-Level Synthesis
dc.typejournal article
dc.volume.number45
dspace.entity.typePublication
relation.isAuthorOfPublication53f86d34-b560-4105-a0bc-a8d1994153ab
relation.isAuthorOfPublicationfb90758b-c96c-4727-94ef-d4aa39c36fc4
relation.isAuthorOfPublicationd8c47930-3f7e-4046-b4d9-a59759643011
relation.isAuthorOfPublication604615ff-3581-4fea-8283-2ca71fd20ae5
relation.isAuthorOfPublication.latestForDiscoveryfb90758b-c96c-4727-94ef-d4aa39c36fc4
Download
Original bundle
Now showing 1 - 1 of 1
Thumbnail Image
Name:
Multispeculative_trees_Microelectronics_v3.3.pdf
Size:
3.33 MB
Format:
Adobe Portable Document Format
downoload Download
Collections
Artículos