Aviso: para depositar documentos, por favor, inicia sesión e identifícate con tu cuenta de correo institucional de la UCM con el botón MI CUENTA UCM. No emplees la opción AUTENTICACIÓN CON CONTRASEÑA
 

High permittivity dielectrics for next generations of integrated circuits

dc.contributor.advisorSan Andrés Serrano, Enrique
dc.contributor.authorFeijoo Guerro, Pedro Carlos
dc.date.accessioned2023-06-19T16:27:35Z
dc.date.available2023-06-19T16:27:35Z
dc.date.defense2013-03-20
dc.date.issued2013-05-22
dc.descriptionTesis inédita de la Universidad Complutense de Madrid, Facultad de Ciencias Físicas, Departamento de Física Aplicada III (Electricidad y Electrónica), leída el 20-03-2013
dc.description.abstractThis thesis studies two different approaches for further downscaling in the CMOS technology and the flash memory devices. In the first place, we study Gd2-xScxO3 deposited by high pressure sputtering as a candidate for the third generation of high k dielectrics. We studied the high k material/Si interface, and an optimization of the growing conditions of the binary components (Gd2O3 and Sc2O3). We assessed the influence of the metal gate on the properties of the binary oxides, comparing Al (reactive), Pt (noble metal) and Ti (oxygen scavenger). Then,we grew ~8 nm amorphous Gd-rich Gd2-xScxO3 films by alternating nano-laminates of Gd2O3 and Sc2O3. Pt gated metal-insulator-semiconductor devices show low density of interface defects, capacitance-voltage hysteresis and leakage current. Gd2-xScxO3 also presents better thermal stability than its binary components. An outstanding value of 25 was calculated for the relative effective permittivity, which makes Gd2-xScxO3 a promising choice for the third generation of high k dielectrics. On the other hand, we studied the reliability of ultra low equivalent oxide thickness triple gated MISFET devices. Three-dimensional transistor architectures are currently replacing traditional planar MISFETs, so the assessment of the reliability becomes vital. Time-dependent dielectric breakdown and positive bias temperature instabilities in FinFETs present no major differences with their planar counterparts.
dc.description.departmentDepto. de Estructura de la Materia, Física Térmica y Electrónica
dc.description.facultyFac. de Ciencias Físicas
dc.description.refereedTRUE
dc.description.statusunpub
dc.eprint.idhttps://eprints.ucm.es/id/eprint/21524
dc.identifier.urihttps://hdl.handle.net/20.500.14352/37491
dc.language.isoeng
dc.page.total228
dc.publication.placeMadrid
dc.publisherUniversidad Complutense de Madrid
dc.rights.accessRightsopen access
dc.subject.cdu621.3.049.77(043.2)
dc.subject.keywordFísica
dc.subject.keywordCircuitos integrados
dc.subject.ucmFísica (Física)
dc.subject.unesco22 Física
dc.titleHigh permittivity dielectrics for next generations of integrated circuits
dc.typedoctoral thesis
dspace.entity.typePublication
relation.isAdvisorOfPublication21e27519-52b3-488f-9a2a-b4851af89a71
relation.isAdvisorOfPublication.latestForDiscovery21e27519-52b3-488f-9a2a-b4851af89a71

Download

Original bundle

Now showing 1 - 1 of 1
Loading...
Thumbnail Image
Name:
T34481.pdf
Size:
13 MB
Format:
Adobe Portable Document Format

Collections