Acceleration of block-matching algorithms using a custom instruction-based paradigm on a Nios II microprocessor.

Simple item page
dc.contributor.authorGonzález, Diego
dc.contributor.authorBotella Juan, Guillermo
dc.contributor.authorGarcía, Carlos
dc.contributor.authorPrieto Matías, Manuel
dc.contributor.authorTirado Fernández, José Francisco
dc.date.accessioned2023-06-19T14:57:49Z
dc.date.available2023-06-19T14:57:49Z
dc.date.issued2013
dc.description© Springer International Publishing AG The authors would like to thank the Altera Company for the provided hardware and software under the University programs. The authors would like to thank Professor Uwe Meyer-Base from Florida State University for his help and support regarding digital signal processing with FPGAs. This work has been partially supported by Spanish Projects TIN 2008/508 and TIN 2012/32180.
dc.description.abstractMedical imaging has become an absolutely essential diagnostic tool for clinical practices; at present, pathologies can be detected with an earliness never before known. Its use has not only been relegated to the field of radiology but also, increasingly, to computer-based imaging processes prior to surgery. Motion analysis, in particular, plays an important role in analyzing activities or behaviors of live objects in medicine. This short paper presents several low-cost hardware implementation approaches for the new generation of tablets and/or smartphones for estimating motion compensation and segmentation in medical images. These systems have been optimized for breast cancer diagnosis using magnetic resonance imaging technology with several advantages over traditional X-ray mammography, for example, obtaining patient information during a short period. This paper also addresses the challenge of offering a medical tool that runs on widespread portable devices, both on tablets and/or smartphones to aid in patient diagnostics.
dc.description.departmentSección Deptal. de Arquitectura de Computadores y Automática (Físicas)
dc.description.facultyFac. de Ciencias Físicas
dc.description.refereedTRUE
dc.description.sponsorshipMinisterio de Economía y Competitividad (MINECO)
dc.description.statuspub
dc.eprint.idhttps://eprints.ucm.es/id/eprint/34717
dc.identifier.citation1. D Marpe, T Wiegand, GJ Sullivan, The H.264/MPEG4 advanced video coding standard and its applications. IEEE Commun Mag 44, 134–143 (2006) 2. ITU-T Recommendation H.264 (draft), International standard for advanced video coding (ITU-T, Geneva, 2003) 3. ITU-T Recommendation H.264 & ISO/IEC 14496-10 (MPEG-4) AVC, Advance Video Coding for Generic Audiovisual Services (ITU-T, Geneva, 2005) 4. J Konrad, Estimating motion in image sequences. IEEE Signal Process Mag 16, 70–91 (1999) 5. S Kappagantula, K-R Rao, Motion compensated interframes image prediction. IEEE Trans Commun 33, 1011–1015 (1985) 6. C-J Kuo, C-H Yeh, S-F Odeh, Polynomial search algorithms for motion estimation, in Proceedings of the 1999 IEEE International Symposium on Circuits and System (ISCAS’99), vol. 4 (Orlando, 1999), pp. 215–218 7. S Zhu, K-K Ma, A new diamond search algorithm for fast block-matching motion estimation. IEEE Trans Image Process 9, 287–290 (2000) 8. S Zhu, Fast motion estimation algorithms for video coding (Nanyang Technology University, Singapore, M.S. thesis, 1998) 9. F Ayuso, G Botella, C García, M Prieto, F Tirado, GPU-based acceleration of bio-inspired motion estimation model. Concurrency and Computation: Practice and Experience 25, 1037–1056 (2013). doi:10.1002/cpe.2946 10. G Botella, A García, M Rodriguez-Alvarez, E Ros, U Meyer-Bäse, MC Molina, Robust bioinspired architecture for optical-flow computation. IEEE Trans. VLSI Syst. 18(4), 616–629 (2010) 11. C Garcia, G Botella, F Ayuso, M Prieto, F Tirado, Multi-GPU based on multicriteria optimization for motion estimation system. EURASIP JOURNAL on Advances in Signal Processing 2013, 23 (2013) 12. D González, G Botella, U Meyer-Baese, C García, C Sanz, M Prieto-Matías, F Tirado, A Low, Cost Matching Motion Estimation Sensor Based on the NIOS II Microprocessor. Sensors 12, 13126–13149 (2012) 13. T Koga, K Iinuma, A Hirano, Y Iijima, T Ishiguro, Motion compensated interframe coding for video conferencing, in Proc. of the Nat. Telecommunications Conference (New Orleans, LA, 1981), pp. G5.3.1–G5.3.5 14. J-R Jain, A-K Jain, Displacement measurement and its application in interframes image coding. IEEE Trans Commun 29, 1799–1808 (1981) 15. B Liu, A Zaccarin, New fast algorithms for estimation of block motion vectors. IEEE Trans. Circuit. Syst. Video Technol. 3, 148–157 (1993) 16. R Li, B Zeng, M-L Liou, A new three-step search algorithm for block motion estimation. IEEE Trans. Circuit. Syst. Video Technol. 4, 438–422 (1994) 17. Altera, Nios II processor: the world's most versatile embedded processor, (2013). http://www.altera.com/devices/processor/nios2/ni2-index.html. Accessed 10 June 2013 18. P Chu, Embedded SoPC Design with NIOS II Processor and Examples (Wiley, Hoboken, 2012) 19. Altera, Nios II performance benchmarks, (2013). http://www.altera.com/ literature/ds/ds_nios2_perf.pdf. Accessed 10 June 2013 20. Altera, Documentation: Nios processor, (2013). http://www.altera.com/ literature/lit-nio.jsp. Accessed 10 June 2013 21. Arm, ARM: the architecture for the digital world, (2013). http://www.arm.com/products/processors/classic/arm9/ . Accessed 10 June 2013 22. Altera, Stratix II FPGA: high performance with great signal integrity, (2013). http://www.altera.com/devices/fpga/stratix-fpgas/stratix-ii/stratix-ii/st2-index.jsp. Accessed 10 June 2013 23. Altera, Hardware acceleration, (2013). http://www.altera.com/devices/processor/nios2/benefits/performance/ni2-acceleration.html. Accessed 10 June 2013 24. Altera, Nios II custom instruction user guide, (2013). http://www.altera.com/literature/ug/ug_nios2_custom_instruction.pdf. Accessed 10 June 2013 25. Y Mandravellos, Code::Blocks IDE, (2006). https://launchpad.net/codeblocks. Accessed 10 June 2013 26. C Yushin, CIPR sequences, (2013). http://www.cipr.rpi.edu/resource/sequences/. Accessed 10 June 2013 27. Altera, DE2 development and education board, (2013). http://www.altera.com/education/univ/materials/boards/de2/unv-de2-board.html. Accessed 10 Feb 2013 28. Altera, Cyclone II FPGAs at cost that rivals ASICs, (2012). http://www.altera.com/devices/fpga/cyclone2/cy2-index.jsp. Accessed 10 June 2013
dc.identifier.doi10.1186/1687-6180-2013-118
dc.identifier.issn1687-6180
dc.identifier.officialurlhttp://dx.doi.org/10.1186/1687-6180-2013-118
dc.identifier.relatedurlhttp://www.asp.eurasipjournals.com/
dc.identifier.urihttps://hdl.handle.net/20.500.14352/34969
dc.journal.titleEurasip Journal on Advances in Signal Processing
dc.language.isoeng
dc.publisherSpringer International Publishing AG
dc.relation.projectIDTIN 2012/32180
dc.relation.projectIDTIN 2008/508
dc.rightsAtribución 3.0 España
dc.rights.accessRightsopen access
dc.rights.urihttps://creativecommons.org/licenses/by/3.0/es/
dc.subject.cdu004
dc.subject.keywordMotion estimation
dc.subject.keywordSearch algorithm.
dc.subject.ucmInformática (Informática)
dc.subject.unesco1203.17 Informática
dc.titleAcceleration of block-matching algorithms using a custom instruction-based paradigm on a Nios II microprocessor.
dc.typejournal article
dspace.entity.typePublication
relation.isAuthorOfPublicationf94b32c6-dff7-4d98-9c7a-00aad48c2b6a
relation.isAuthorOfPublication5d3f6717-1495-4217-853c-8c9c75d56620
relation.isAuthorOfPublication1356616c-9e69-4852-8415-62fd0b8e7cfc
relation.isAuthorOfPublication.latestForDiscoveryf94b32c6-dff7-4d98-9c7a-00aad48c2b6a
Download
Original bundle
Now showing 1 - 1 of 1
No Thumbnail Available
Name:
tirado07libre+CC.pdf
Size:
1.13 MB
Format:
Adobe Portable Document Format
downoload Download
Collections
Artículos