Multi-fidelity surrogate models for accelerated multi-objective analog circuit design and optimization

Abstract

This work presents a unified framework for multiobjective analog circuit optimization that combines surrogate modeling, uncertainty-aware evolutionary search, and adaptive high-fidelity verification. The approach integrates ensemble regressors and graph-based surrogate models with a closed-loop multi-fidelity controller that selectively invokes SPICE evaluations based on predictive uncertainty and diversity criteria. The framework includes reproducible caching, metadata tracking, and process- and Dask-based parallelism to reduce redundant simulations and improve throughput. The methodology is evaluated on four CMOS operational-amplifier topologies using NSGA-II, NSGA-III, SPEA2, and MOEA/D under a uniform configuration to ensure fair comparison. Surrogate-Guided Optimization (SGO) replaces approximately 96.5% of SPICE calls with fast model predictions, achieving about a 20× reduction in total simulation time while maintaining close agreement with ground-truth Pareto fronts. Multi-Fidelity Optimization (MFO) further improves robustness through adaptive verification, reducing SPICE usage by roughly 90%. The results show that the proposed workflow provides substantial computational savings with consistent Pareto-front quality across circuit families and algorithms. The framework is modular and extensible, enabling quantitative evaluation of analog circuits with significantly reduced simulation cost.