On the influence of substrate cleaning method and rapid thermal annealing conditions on the electrical characteristics of Al/SiNx/SiO2/Si fabricated by ECR-CVD

Abstract

We investigate the influence of the used cleaning method and rapid thermal annealing (RTA) conditions on the electrical characteristics of MIS devices based on SiNy:H/SiOx dielectric stack structures fabricated by electron-cyclotron-resonance plasma assisted chemical vapour deposition (ECR-CVD). We use capacitance-voltage (C-P) technique to study charge trapped in the insulator, Deep Level Transient Spectroscopy (DLTS) to study the trap distributions at the interface, and conductance transient (G-t) technique to determine the energy and geometrical profiles of electrically active defects at the insulator bulk as these defects follow the disorder-induced gap state (DIGS) model.