On the influence of substrate cleaning method and rapid thermal annealing conditions on the electrical characteristics of Al/SiNx/SiO2/Si fabricated by ECR-CVD

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2005

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Pergamon-Elsevier Science Ltd.
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[1] Green, M.L., Gusev, E.P., Degraeve, R., Garfunkel, E.L., J. Appl. Phys., 2001,90, 2057. [2] Basa, D.K., Bose, M., Bose, D.N., J. Appl. Phys., 2000, 87, 4324. [3] Del Prado, Á., Martínez, F., Mártil, I., González-Díaz, G., Fernández, M., J. Vac. Sci. Technol. A, 1999, 17, 1263. [4] Kern, W., RCA Rev., 1970, 31, 187. [5] He, L., Hasegawa, H., Sawada, T., Ohno, H., J. Appl. Phys., 1988, 63, 2120. [6] Dueñas, S., Peláez, R., Castán, H., Pinacho, R., Quintanilla, L., Barbolla, J., et al., Appl. Phys. Lett., 1997, 71, 826. [7] Castán, H., Dueñas, S., Barbolla, J., Redondo, E., Blanco, N., Mártil, I., et al., Microelectron. Reliab., 2000, 40, 845.
Abstract
We investigate the influence of the used cleaning method and rapid thermal annealing (RTA) conditions on the electrical characteristics of MIS devices based on SiNy:H/SiOx dielectric stack structures fabricated by electron-cyclotron-resonance plasma assisted chemical vapour deposition (ECR-CVD). We use capacitance-voltage (C-P) technique to study charge trapped in the insulator, Deep Level Transient Spectroscopy (DLTS) to study the trap distributions at the interface, and conductance transient (G-t) technique to determine the energy and geometrical profiles of electrically active defects at the insulator bulk as these defects follow the disorder-induced gap state (DIGS) model.
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Workshop on Dielectrics in Micoelectronics (WoDiM 2004) (13. 2004. Cork, Irlanda). © 2004 Elsevier Ltd. All rights reserved.
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