A Method to Neutralize the Impact of DVS on the Reliability of COTS SRAMs with ECC by Using Periodic Scrubbing

Abstract

Dynamic Voltage Scaling (DVS) can be used to reduce the power consumption of onboard systems by dynamically lowering the bias voltage of volatile SRAMs while they remain idle. In the "New Space" paradigm, Commercial-Off-The-Shelf (COTS) SRAMs, most of which suppport DVS, are popular since they provide high performance and low cost, even though they are not specifically designed for space. An important drawback of DVS is that it leads to a significant increase of the device’s sensitivity to Single Event Effects (SEEs). Thus, in order to counteract this negative side effect, DVS can be combined with scrubbing, which consists of periodically "refreshing" the information stored in the memory. This prevents the accumulation of too many bitflips on the memory, allowing Error Correcting Codes (ECC), usually implemented in most COTS memories, to remain effective. However, scrubbing has a non-negligible overhead on the power consumption of the system that needs to be taken into account in order to evaluate if DVS will be globally beneficial. In other words, it is not evident whether or not DVS will lead to significant power savings. This paper provides guidelines on how to effectively combine both DVS and scrubbing on volatile COTS SRAMs with embedded ECC. The objective is to dynamically save as much power as possible, while ensuring that the increased sensitivity resulting from applying DVS does not impact the effectiveness of the SRAM’s ECC.